Semiconductor Engineering

RISC-V decoupled Vector Processing Unit (VPU) For HPC

A technical paper titled “Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications” was published by researchers at Barcelona Supercomputing Center ...
Design-Reuse

Vitruvius+: An Area-Efficient RISC-V Decoupled Vector Coprocessor for High Performance Computing Applications

The maturity level of RISC-V and the availability of domain-specific instruction set extensions, like vector processing, make RISC-V a good candidate for supporting the integration of specialized ...
Design-Reuse

Altera's Nios II Processor Supported by Vector Informatik's OSEK/VDX-Compliant RTOS for Automotive Applications

FPGA-Based Embedded Processor Supports Europe’s Leading RTOS Standard San Jose, Calif., April 3, 2007—Altera Corporation’s (NASDAQ: ALTR) Nios® II embedded processor is now supported by Vector ...
The Next Platform

ARM Puts Some Muscle Into Vector Number Crunching

If the ARM processor in its many incarnations is to take on the reigning Xeon champ in the datacenter and the born again Power processor that is also trying to knock Xeons from the throne, it is going ...