Santa Clara, Calif., October 16, 2002 – Tensilica, Inc., the leader in configurable and extensible processors, announced that Bill Huffman, Tensilica’s Chief Architect, will preview the ...

SANTA CLARA, Calif., June 16, 2003 – Tensilica, Inc. the leading supplier of configurable and extensible microprocessor cores, today introduced Xtensa Xplorer, the first integrated design ...

Constrained-random verification (CRV) offers a highly effective way to deal with the challenges of microprocessor verification. These verification challenges are overwhelming for many reasons: complex ...

Cache prefetching is what allows processors to have data and/or instructions ready for use in a fast local cache rather than having to wait for a fetch request to trickle through to system RAM and ...